1. Field of the Invention
The present invention relates to a liquid crystal display device and a method of manufacturing the same and, more particularly, a liquid crystal display device in which a peripheral circuit or a signal processing circuit having CMOS field effect transistors is built and a method of manufacturing the same.
2. Description of the Prior Art
In the active-matrix type liquid crystal display device in which the peripheral circuit or the signal processing circuit is built, the thin film transistors (TFTs) are employed as the CMOS transistors of the analog switch or the inverter in not only the display region but also the peripheral circuit or the signal processing circuit.
The low-temperature polysilicon technology is applied to the thin film transistors in the peripheral circuit or the signal processing circuit like the display region.
The low-temperature crystallization technology is indispensable to the manufacture of the high performance/low cost peripheral driver circuit TFTs. The typical crystallization technology that is currently put to practical use is the low-temperature crystallization technology employing the excimer laser. This excimer laser makes it possible to form the silicon crystal thin film with good quality on the low-melting glass.
The basic crystallization method by the excimer laser is given as follows, for example.
First, the amorphous silicon (a-Si) starting thin film is formed on the glass substrate by using the thin film forming method such as PECVD (Plasma-Enhanced CVD), etc. Then, in order to improve the laser resistance of the starting thin film, the hydrogen in the a-Si starting thin film is removed by the heating process at 400 to 450° C. Then, the polysilicon thin film is formed by irradiating the laser beam of the excimer laser onto the a-Si starting thin film to crystallize it. Then, the crystallinity is improved by processing the polysilicon thin film in the atmosphere such as hydrogen, steam, etc.
By employing such polysilicon thin film, the switching TFT array is formed in the pixel display portion and also the semiconductor integrated circuit is formed in the peripheral circuit portion on the same substrate. Normally the liquid crystal display device in which the peripheral circuits are built is composed of the pixel display portion TFT array, the gate driver circuit, and the data driver circuit. In the data driver circuit, normally the high performance TFTs that have the operating frequency in the range of several megahertz (MHz) to several tens MHz, the field effect mobility of 50 to 300 cm2/Vs, and the proper threshold voltage Vth are used.
However, the request for the mobility of TFT is not so severe in the gate driver circuit and the pixel display portion, and the mobility of more than 20 cm2/Vs, for example, may be employed.
In contrast, as the new technical trend of the liquid crystal display device, it is intended to attain the ultra high-definition display panel and the high performance built-in type large-scale semiconductor circuit.
First, the ultra high-definition display panel will be explained hereunder.
With the progress of the multimedia technology and the mobile technology and also the spread of the Internet, it is usually needed to peruse/process a great deal of information. Therefore, the request of the ultra high-definition display function in specification for the liquid crystal display device as the man-machine interface is increased. For instance, the large-size high-definition display device of more than 200 dpi or the small-size mobile ultra high-definition liquid crystal display device are required in the application fields such as the multi-screen display, the multitasking process, the CAD design, etc.
Then, the high performance liquid crystal panel built-in large-scale semiconductor circuit will be explained hereunder.
In the low-temperature polysilicon integrated panel, there appears the technical trend that can accomplish the intelligent panel or the sheet computer by providing the high performance large-scale semiconductor integrated circuit to the peripheral circuit portion. For example, it is possible that the digital driver, the data processing circuit, the memory array, the interface circuit, and the CPU are built in the liquid crystal display panel on the data side.
The ordinary thin film transistors are employed as the active elements employed in such peripheral circuit. As set forth in Patent Application Publication (KOKAI) 2000-36599, for example, respective thin film transistors in the peripheral circuit portion and the pixel portion are formed by the same steps, and also the wirings formed on these thin film transistors are formed by the same steps.
For instance, as shown in FIG. 1, the thin film transistor 101 in the display portion A and the thin film transistor 102 in the peripheral circuit portion B are formed simultaneously on one substrate 103, and then these thin film transistors 101, 102 are covered with the first interlayer insulating film 104. The polysilicon film 100 constituting the thin film transistors 101, 102 is formed by patterning the above low-temperature polysilicon film. The gate insulating film 110 is formed between the polysilicon film 100 and the gate electrodes 101g, 102g. In this case, the gate electrodes 101g, 102g are formed at the same time as the first-layer wiring (not shown).
Then, the second-layer wiring 105, the second interlayer insulating film 106, the third-layer wiring 107, and the third interlayer insulating film 108 are formed in sequence on the first interlayer insulating film 104. The second-layer wiring 105 is connected to the thin film transistor 101 in the display portion A and the thin film transistor 102 in the peripheral circuit portion B via the holes formed in the first interlayer insulating film 104 respectively. The third-layer wiring 107 is connected to the thin film transistor 102 in the peripheral circuit portion B via the hole formed in the second interlayer insulating film 106. The metal constituting the second-layer wiring 105 is used as the black matrix BM in the display portion A. Also, the pixel electrode 109 is formed on the third interlayer insulating film 108 in the display portion A, and the pixel electrode 109 is connected to the source region of the thin film transistor 101.
In this case, in the liquid crystal display panel, the pixel pitch is reduced smaller with the progress of the high definition display, and thus the peripheral circuit density is extremely increased. For such purpose, the ultra-high definition panel having the digital driver therein and having more than 200 dpi must be formed.
For example, in the case of the 8.4 type UXGA panel, the pixel number is 1600 (horizontal direction)×3×1200 (vertical direction), the display definition is 238 dpi, and the sub pixel pitch is 35.5 μm. As other example, in the case of the 15 type QXGA panel, the pixel number is 2048 (horizontal direction)×3×1536 (vertical direction), the display definition is 171 dpi, and the sub pixel pitch is 49.5 μm.
In order to drive such pixel column of one vertical line, the peripheral circuit consisting of several hundreds to several thousands TFTs must be installed into such narrow pixel pitch region. Also, in order to manufacture the high performance low-temperature polysilicon, the intelligent panel, the sheet computer, etc., the large-scale integrated circuits such as the digital driver, the data processing circuit, the memory array, the interface circuit, the CPU, etc. must be built in the peripheral region. Thus, these large-scale integrated circuits must be installed in the narrow frame region.
In contrast, because of the requests for the lightweight and the compactness, the frame allowed for the liquid crystal panel is in the range of several mm from the edge of the glass substrate. Thus, it is impossible to expect the panel that has the frame of more than 10 mm.
In case the TFTs are arranged to satisfy the above conditions, the wiring pitch is narrowed. Therefore, there is caused such a new problem that the floating capacitance between the wirings is increased.
Also, in the multi-layered wiring structure shown in FIG. 1, the insulating film must be formed between the uppermost wiring and the pixel electrode respectively, and also the hole for connecting the uppermost wiring and the pixel electrode must be formed in the insulating film. Therefore, the pixel electrode connecting hole must be formed singularly, and thus there is the possibility that the throughput is lowered.